Design of Modified March-C Algorithm and Built-in self-test architecture for Memories
نویسندگان
چکیده
منابع مشابه
Low Power March Memory Test Algorithm for Static Random Access Memories (TECHNICAL NOTE)
Memories are most important building blocks in many digital systems. As the Integrated Circuits requirements are growing, the test circuitry must grow as well. There is a need for more efficient test techniques with low power and high speed. Many Memory Built in Self-Test techniques have been proposed to test memories. Compared with combinational and sequential circuits memory testing utilizes ...
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Test Pattern Generators (TPG) are very important logic part of the Circuits that have self-test features. Nowadays, the self-test feature is an in-built part of the modern application hardware designs. This feature enables the user to test and verify the specific hardware failure with the help of the hardware itself. To enable self-test an extra operational and control circuit is required by th...
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Flash memories are a type of non-volatile memory based on floating-gate transistors. The use of commodity and embedded flash memories are growing rapidly as we enter the system-on-chip (SOC) era. Conventional tests for flash memories are usually ad hoc—the test procedure is developed for a specific design. We propose improved March-like algorithms (i.e., March FT) for both bit-oriented and word...
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15 صفحه اولEfficient built-in self-test algorithm for memory
We present a new pseudorandom testing algorithm f o r the Built-In Self-Test (BIST) of DRAM. In this algorithm, test patterns are complemented to generate state-transitions that are needed f o r the detection of coulping faults. A s a result, the number of test patterns required is less than half of the traditional method, while the extra hardware is negligible.
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ژورنال
عنوان ژورنال: 3C Tecnología_Glosas de innovación aplicadas a la pyme
سال: 2020
ISSN: 2254-4143
DOI: 10.17993/3ctecno.2020.specialissue4.219-229